
PIC16C71X
DS30272A-page 24
1997 Microchip Technology Inc.
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine (if interrupts are used).
EXAMPLE 4-1:
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
ORG 0x500
BSF
PCLATH,3
;Select page 1 (800h-FFFh)
BCF
PCLATH,4
;Only on >4K devices
CALL
SUB1_P1
;Call subroutine in
:
;page 1 (800h-FFFh)
:
ORG 0x900
SUB1_P1:
;called subroutine
:
;page 1 (800h-FFFh)
:
RETURN
;return to Call subroutine
;in page 0 (000h-7FFh)
4.5
Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = '0') will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
is not used in the PIC16C71X devices.
A simple program to clear RAM locations 20h-2Fh
EXAMPLE 4-2:
INDIRECT ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR,F
;inc pointer
btfss
FSR,4
;all done?
goto
NEXT
;no clear next
CONTINUE
:
;yes continue
FIGURE 4-15:
DIRECT/INDIRECT ADDRESSING
Note 1:
The RP1 and IRP bits are reserved, always maintain these bits clear.
Data
Memory
Indirect Addressing
Direct Addressing
bank select
location select
RP1:RP0
6
0
from opcode
IRP(1)
FSR register
7
0
bank select
location select
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
FFh
80h
7Fh
00h
17Fh
100h
1FFh
180h
Not
Used